Senior RTL Design Engineer
Our mission is to radically reduce the cost of artificial intelligence.
We are the world leaders in algorithm/hardware co-design for artificial intelligence. Our roadmap begins with products 100x better than GPUs and will ultimately deliver products that are many orders of magnitude more cost effective than what is available today. We will ultimately be able to put models the size of ChatGPT into chips the size of a thumbnail.
This is a remote role, so you can work from anywhere in the United States.
- Work closely with the architecture team to translate architecture requirements into RTL designs
- Propose changes to DL-focused microarchitectures to improve power and efficiency, running performance studies with architecture team
- Run front-end tools to ensure lint-free and CDC/RDC clean design
- Work with the broader Silicon Team to support functional verification (includes initial verification) and physical design
- Extension of RISC ISA
- Produce documentation covering design decisions
- BS/MS in Electrical Engineering or Computer Engineering with 5 + years of experience microprocessor architecture, microarchitecture definition, and RTL design
- A successful track record of producing high performance designs in production for low-power applications
- Familiarity with verification and physical design for custom circuits
- Familiarity with industry standard custom, semi-custom and fully automated design flows
- Familiarity with memory design, I/O interfaces and I/O IP Integration
- Programming experience in Python, TCL or a similar scripting language
- Exhibit a high degree of motivation and independence
- Willingness & excitement to collaborate closely with system architects and the broader silicon team
- Strong communication skills, both written and verbal
- MS in Electrical Engineering or Computer Engineering with 5+ years experience with a focus on low power AI accelerators and CPU architectures
- Design experience with RISC-V microprocessors
- Experience writing SystemC models of key microarchitecture blocks
- Experience in AI accelerators and data-flow architectures and understanding of state of the art near- and in-memory computing fabrics
- Familiarity deep learning and datatypes used for state of the art quantization
- Medical Insurance with 100% coverage of employee premiums
- Dental and Vision Insurance
- 401k match
- Unlimited PTO + all federal holidays
- Company wide time off: Time between Christmas and New Years, week of the 4th of July off
- Work from anywhere in the United States
- And more!
The anticipated annual base salary for this position is $180,000 - $260,000. This range does not include any other compensation components or other benefits that an individual may be eligible for.